By Francisco Azevedo
Structures are topic to faults of their elements, affecting their total behaviour. In a "black-box" method, such faults purely develop into obvious within the output whilst applicable inputs are given, which poses a few pride and optimization difficulties concerning either checking out and diagnosing. This paintings addresses such difficulties constructing types with multi-valued logics that it formalizes and generalizes to a number of faults. Such logics expand Boolean common sense through encoding dependencies on faults, hence permitting the modelling of an arbitrary variety of diagnostic theories. The effectiveness of constraint fixing over finite domain names and units is proven on a number of difficulties.
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Additional resources for Constraint Solving over Multi-Valued Logics: Application to Digital Circuits
1990]. 18 Chapter 2. e. the set of tests that detect/contains gs. As an example, for z = x and y, the single test that detects g = x s-a-1 is t = 01 that also detects f= z s-a-1. Fault/thus dominates g and can be discarded. 4. 5 Our Modelling Approach We have adopted a structural gate-level code-based modelling for the ISCAS benchmarks. It is a gate-level model since the lowest-level primitive components are gates (including the xor-gate) that cannot be structurally decomposed. The logic value of each signal line is given by a different variable.
For off-line testing, we will only deal with permanent faults since modelling intermittent and transient faults requires statistical data on their probability of occurrence, which are usually not available. Given such a permanent fault and a model of the circuit, it is possible to determine its logic function in the presence of the fault. Thus we also define faults as structural faults or 15 functional faults according to the circuit model used. Structural faults only modify the value of interconnections among components assumed to be fault-free, whereas functional faults change the truth table of a component.
Also, line justification problems can be solved independently since the corresponding sets of Pis to assign are mutually disjoint. For the general and usual case of circuits with fanout, the fault must still, be activated leaving a line-justification problem, but there may be several options to propagate a fault. Once a propagation path is chosen, all that remains are line-justification problems. These problems, however, may no longer be independent with (reconvergent) fanout, and are a source for the possible conflicts.